无人机数据链判决反馈均衡器的FPGA实现

FPGA implementation of decision feedback equalizer in UAV data link system

摘要:

从无人机数据链的需求出发，使用现场可编程门阵列(FPGA)实现判决反馈均衡器(DFE)，以消除无人机数据链中的码间干扰。文中利用System Generator 对判决反馈均衡器进行建模，将模型转换为硬件，并通过硬件协调仿真在Xilinx virtex5 XC5VSX50T芯片上验证。仿真结果表明，在不同信道条件下，判决反馈均衡器能很好地克服码间干扰，适用于无人机信道。本文为无人机高速数据链均衡器的实现打下基础。

Abstract:

Decision Feedback Equalizer(DFE) is implemented by Field Programmable Gate Array，(FPGA) in order to eliminate inter-symbol interference. A model of decision feedback equalizer is built based on System Generator. The model is converted into hardware, and its function is verified through hardware co-simulation on Xilinx virtex5 XC5VSX50T chip. Simulation result shows that the equalizer can overcome inter-symbol interference perfectly under different channel conditions, and is fit for the channel of UAV. This work lays the foundation for the realization of high-speed data link equalizer for UAV.