Signal separation is the key step in a radar reconnaissance system. Separating radar signals on Field Programmable Gate Array(FPGA) has significant impact on speed and reliability of a system. A new structure without any microprocessor is proposed based upon the Board First Search Neighbors(BFSN) clustering algorithm and being implemented on FPGA. An implementation on Xilinx Virtex 5 FPGA is performed and computer simulation and hardware testing experiment are executed. The results verify the capability of the proposed structure to handle the signals of 5 simulative radars,and certify the feasibility and high efficiency of radar signal separating method using FPGA.