一种D波段低噪声放大器芯片设计

Design of D-band LNA chip

摘要:

提出了一种晶体管器件模型修正方法，校准了Ommic公司D007IH工艺中D波段晶体管模型和D波段共面波导传输线电路模型。该校准方法中通过与共面波导(CPW)三维模型仿真结果的曲线拟合，确定了D波段传输线电路模型的介电常数；通过与CGY2191UH芯片的S参数测试结果拟合，修正了晶体管器件模型。为了验证了设计方法的有效性，基于修正模型设计了一款低噪声放大器芯片，仿真结果表明，工作频率为110 GHz~170 GHz，增益大于29 dB，噪声系数小于6 dB。

Abstract:

A novel method of modified transistor model is introduced. The D-band transistor models of OMMIC D007IH and D-band Coplanar Waveguide(CPW) model are modified. The method determines dielectric constant of CPW model by simulation curve fitting. The value of CGD in the transistor models is modified by curve fitting of CGY2191UH chip S-parameter measurement. A D-band Low Noise Amplifier(LNA) die is designed by the modified transistor model. The simulation results show that the LNA obtains a gain more than 29 dB in 110 GHz-170 GHz range and the noise figure is lower than 6 dB. The results validate the proposed method.