An Efficient High Speed VLSI Architecture for 1-level 2-D Discrete Wavelet Transform

An Efficient High Speed VLSI Architecture for 1-level 2-D Discrete Wavelet Transform
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An efficient and high speed pipeline Very Large Scale Integration(VLSI) architecture for 1? level 2?D Discrete Wavelet Transform(DWT) is proposed,of which buffer between column and row transform is not needed.Its row transform module is a reconfigurable h

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侯慧,曹伟,张钒炯,来金梅,童家榕.一种快速高效的二维一级小波变换的硬件实现[J]. Journal of Terahertz Science and Electronic Information Technology ,2008,6(4):

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