Abstract:A broadband Transimpedance Amplifier(TIA) chip architecture and circuit design suitable for highspeed optical receiver systems are proposed. The TIA chip, as the backend circuit of the photoelectric detector, can amplify the high speed photo-current of the detector with a low input referred noise and meet the requirements of system-level speed and sensitivity. The high-speed TIA design architecture consists of three parts: the TIA core circuit, the single-ended to differential conversion circuit, and the limiting amplifier circuit. In the design of the limiting amplifier, the Miller effect is utilized to introduce tunable capacitors to balance the output voltage amplitude, bandwidth, and circuit stability of the high-frequency circuit, achieving broadband signal reception, limiting amplification, and external driving functions, thereby enhancing the quality of high-speed transmission signals. By conducting small-signal amplitude-frequency characteristic analysis, noise simulation, and large-signal time-domain analysis of the chip under different process corners, the bandwidth, noise, sensitivity and transmission characteristics of the TIA chip are further verified.